Product Summary

The HY57V641620HGT-5 is a 67,108,864-bit CMOS Synchronous DRAM, ideally suited for the main memory applications which require large memory density and high bandwidth. The HY57V641620HGT-5 is organized as 4banks of 1,048,576x16. The HY57V641620HGT-5 is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input.

Parametrics

HY57V641620HGT-5 absolute maximum ratings: (1)Ambient Temperature TA: 0 ~ 70 °C; (2)Storage Temperature TSTG: -55 ~ 125 °C; (3)Voltage on Any Pin relative to V SS V IN, V OUT: -1.0 ~ 4.6 V; (4)Voltage on V DD relative to V SS V DD, V DDQ: -1.0 ~ 4.6 V; (5)Short Circuit Output Current IOS: 50 mA; (6)Power Dissipation P D: 1 W; (7)Soldering Temperature × Time TSOLDER: 260 × 10°C × Sec.

Features

HY57V641620HGT-5 features: (1)Single 3.3±0.3V power supply ; (2)All device pins are compatible with LVTTL interface; (3)JEDEC standard 400mil 54pin TSOP-II with 0.8mm of pin pitch; (4)All inputs and outputs referenced to positive edge of system clock; (5)Data mask function by UDQM or LDQM; (6)Internal four banks operation.

Diagrams

HY57V641620HGT-5 block diagram

HY57V121620(L)T
HY57V121620(L)T

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Data Sheet

Negotiable 
HY57V161610D
HY57V161610D

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Negotiable 
HY57V161610D-I
HY57V161610D-I

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Data Sheet

Negotiable 
HY57V161610E
HY57V161610E

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Negotiable 
HY57V161610ET-I
HY57V161610ET-I

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Data Sheet

Negotiable 
HY57V161610ETP-I
HY57V161610ETP-I

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Data Sheet

Negotiable